1. Field of the Invention
The present invention generally relates to the art of electronic signal processing using transistor circuits, and more specifically to a single-ended or symmetrical bipolar bias current source for a transistor amplifier or the like having a high power supply rejection ratio (PSRR) and stable startup operation.
2. Description of the Related Art
The specifications for state-of-the-art analog-to-digital converters (ADC) and other devices utilizing integrated circuit analog transistor amplifiers are becoming increasingly stringent. Amplifiers for extremely small signal and wide dynamic range applications require bias current supplies with correspondingly high PSRR and stable settling during startup.
An example of a device to which the present invention relates is disclosed in U.S. Pat. No. 4,970,470, entitled "DC-COUPLED TRANSIMPEDANCE AMPLIFIER", issued Nov. 13, 1990 to R. Gosser. The device is a current feedback amplifier having symmetrical bipolar (positive and negative) push-pull stages which require symmetrical bias currents. Although adequate for some applications, an amplifier such as disclosed by Gosser has a PSRR on the order of -60 db, which is unacceptably low to meet the advanced demands of future technology.
The symmetrical bipolar bias currents in Gosser's amplifier are provided by a master bias circuit 10 which is illustrated in present FIG. 1 and includes a bandgap reference source 12 which drops a highly stable reference voltage VREF thereacross. The source 12 has a positive terminal 12a which is connected through a resistor 14 to the collector of an NPN bipolar transistor 16, and a negative terminal 12b which is connected through a resistor 18 to the emitter of the transistor 16. The positive terminal 12a is also connected to the base of the transistor 16.
A positive current mirror 20 includes a PNP transistor 22 and an NPN transistor 24 which are connected in a Darlington compound transistor configuration, with the emitter of the transistor 24 being connected to the base of the transistor 22 and the collector of the transistor 24 being connected to the emitter of the transistor 22. The collector of the transistor 22 is connected to the collector of the transistor 16, whereas the emitter of the transistor 22 is connected through a resistor 26 to a positive voltage supply +VDD.
The collector of the transistor 22 is also connected to the base of a PNP transistor 28, the collector of which is connected to a negative voltage supply -VEE and the emitter of which is connected to the base of the transistor 24. The base of the transistor 24 is further connected to the supply +VDD through a resistor 30 and to the base of an NPN transistor 32. The voltage supplies +VDD and -VEE are equal and opposite relative to ground.
The transistor 32 is connected to a PNP transistor 34 in a Darlington configuration, with the emitter of the transistor 32 being connected to the base of the transistor 34 and the collector of the transistor 32 being connected to the emitter of the transistor 34. The emitter of the transistor 34 is connected to the source +VDD through a resistor 36, whereas the collector of the transistor 34 is connected to the positive end of a load 38 which symbolically represents the push-pull amplifier stages of Gosser's device.
A negative current mirror 40 includes a NPN transistor 42 and a PNP transistor 44 which are connected in a Darlington configuration, with the emitter of the transistor 44 being connected to the base of the transistor 42 and the collector of the transistor 44 being connected to the emitter of the transistor 42. The collector of the transistor 42 is connected to the negative terminal 12b of the source 12, whereas the emitter of the transistor 42 is connected through a resistor 46 to the supply -VEE.
The collector of the transistor 42 is also connected to the base of an NPN transistor 48, the collector of which is connected to the supply +VDD and the emitter of which is connected to the base of the transistor 44. The base of the transistor 44 is further connected to the supply -VEE through a resistor 50 and to the base of a PNP transistor 52.
The transistor 52 is connected to an NPN transistor 54 in a Darlington configuration, with the emitter of the transistor 52 being connected to the base of the transistor 54 and the collector of the transistor 52 being connected to the emitter of the transistor 54. The emitter of the transistor 54 is connected to the source -VEE through a resistor 56, whereas the collector of the transistor 54 is connected to the negative end of the load 38.
A resistor 58 is connected between the emitters of the transistors 24 and 44, whereas a resistor 60 is connected between the emitters of the transistors 32 and 52. The resistances of the resistors 58 and 60 are selected to be sufficiently high that the resistors 58 and 60 approximate constant current sources for the transistors 24,44 and 32,52.
The voltage at the base of the transistor 24 is one forward-biased diode drop Vbe above the voltage at the collector of the transistor 22 due to the base-emitter drop (equal to Vbe) across the transistor 28. The voltage at the emitter of the transistor 24 and thereby at the base of the transistor 22 is one diode drop below the voltage at the base of the transistor 24. These two diode drops cancel, such that the voltage at the base of the transistor 22 is equal to the voltage at the collector thereof.
The Darlington configuration of the transistors 22 and 24 cancels the base current modulation which is present in the transistor 22 in a known manner. The transistors 24 and 28 effectively connect the base and collector of the transistor 22 together such that the transistors 22, 24 and 28 in combination are electrically equivalent to a diode.
The voltage across the resistor 18 is equal to the reference voltage VREF minus the Vbe drop across the base-emitter junction of the transistor 16. This causes a reference current IREF to flow through the resistor 18 and, neglecting the base current of the transistor 16, into the collector and out of the emitter of the transistor 16.
The bandgap reference source 12, transistor 16 and resistors 14 and 18 constitute a reference current generator 62 which generates the reference current IREF with high precision and stability. Neglecting the base currents of the transistors 28 and 48, the reference current IREF flows from the positive supply +VDD through the resistor 26, transistors 22, 16 and 42 and resistor 46 to the negative supply -VEE.
The transistors 22, 24 and 28 and resistor 26 constitute an input section 20a of the current mirror 20. Due to the diode connection of the transistor 22, the base (and collector) voltage of the transistor 22 adjusts to a level which accommodates the current IREF flowing therethrough.
The transistors 32, 34 and 36 constitute an output section 20b of the current mirror 20. The base of the transistor 24 is connected to the base of the transistor 32, such that the base voltage of the transistor 34 is equal to the base voltage of the transistor 22. Assuming that the transistors 22, 24, 28, 32 and 34 and resistors 26 and 36 are matched, the current IBIAS=IREF will flow through the transistor 34 into the load 38. If these components are not matched, a current IBIAS will flow through the transistor 34 into the load 38 which corresponds to, but is different from, the reference current IREF.
The input section 20a of the current mirror 20 acts as a current source which sources the reference current IREF from the supply +VDD into the generator 62, with the current being regulated by the bandgap reference source 12. The input section 20a also mirrors the reference current IREF to the output section 20b which sources the reference current (or a corresponding current) from the supply +VDD into the load 38.
The operation of the current mirror 40 is symmetrical to that of the current mirror 20. The input section 40a sinks the current IREF from the generator 62 to the supply -VEE, and mirrors the current IREF to the output section 40b which sinks the current IREF (or a current corresponding to the current sourced by the output section 20b) from the load 38 to the supply -VEE.
Although only one output section 20b and 40b is illustrated for each of the current mirrors 20 and 40 respectively, the output sections 20b and 40b may be replicated to provide one or more additional output sections which are mirrored to the input sections 20a and 40a as indicated by broken lines 64 and 66 respectively.
The generator 62 and input sections 20a and 40a of the current mirrors 20 and 40 respectively are illustrated in FIG. 2. As discussed above, the bases of the transistors 22 and 42 are connected to the collectors thereof, are electrically equivalent to diodes, and are thusly represented in FIG. 2. The diode-connected transistors 22 and 42 have very low resistance, and the PSRR is primarily determined by the resistances of the resistors 26, 46, 14 and 18.
As disclosed by Gosser, the resistances of these resistors are low, with 26 and 46 being 400 .OMEGA. and 18 being 300 .OMEGA.. For this reason, a fluctuation in either of the voltage supplies +VDD and -VEE will modulate the collector-emitter voltage of the transistor 16 and cause a corresponding variation in IREF. This is because due to the very low resistances of the resistors 26, 46 and 18, the collector and emitter voltages of the transistor 16 follow the supply voltages +VDD and -VEE relatively closely, and the PSRR is thereby relatively low.
Another problem inherent in Gosser's bias circuit 10 is that the settling during startup is relatively unstable. The bandgap reference source 12 if; connected in series with the resistor 14 which has a relatively high value (10 K.OMEGA.), and is not controlled by any kind of feedback loop. The voltage at the upper or lower end of the source 12 is, in the worst case scenario, capable of latching to the supply VDD or -VEE respectively. This would render the circuit 10 inoperative until the situation was corrected.